ARCHITECTURE / 2015—2026
AI 基础设施研究文库

Architecture Notes

围绕 CPU、内存与互联、chiplet、AI 服务和数据中心约束的架构短文。

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17 篇全文
Local memory and a remote cache across a costly package boundary.
E01 · Coherence & topology

When Remote Cache Is Slower Than Memory: MI Is Correctness, ESF&OD Is Economics

2026-09-28 · English

Moving bulky KV state competes with rebuilding it close to compute.
E02 · Memory & inference

When Fetching a KV Prefix Costs More Than Recomputing It

2026-09-05 · English

Similar servers can produce persistently different service queues.
E03 · CPU & fleet

One CPU SKU Is Not One Latency Distribution

2026-09-12 · English

Good individual chiplets do not guarantee a good assembled product.
E04 · Chiplets & economics

Known-Good Die Does Not Mean Known-Good Product

2026-09-19 · English

Accelerator choices compete for a fixed facility power budget.
E05 · Power & capacity

The Cheapest Accelerator Can Waste the Most Expensive Megawatt

2026-09-26 · English

Separated inference phases repeatedly move conversation state.
E06 · Inference & placement

When Separating Prefill and Decode Creates More Work

2026-09-28 · English

A large page carries cold data alongside small hot regions.
E07 · Memory & translation

Huge Pages, Tiny Hotspots

2026-09-28 · English

Drafting and verification consume resources alongside useful decoding.
E08 · Inference & scheduling

Speculative Decoding Can Spend More Than It Saves

2026-09-28 · English

Additional cores converge on a constrained memory path.
E09 · CPU & fleet

More Cores, Less Useful Server

2026-09-28 · English

Sparse workers still wait for communication and synchronization.
E10 · Sparse compute & synchronization

Sparsity Saves FLOPs and Buys a Barrier

2026-09-28 · English

Independent servers share a contended memory pool.
E11 · Memory & tail latency

Pooled Memory Can Pool the Tail

2026-09-28 · English

A fast local kernel competes with neighboring service work.
E12 · Kernels & service performance

The Fastest Kernel Can Slow the Service

2026-09-28 · English

Saved state is useful only when it can reach replacement compute.
E13 · Recovery & systems

A Checkpoint Is Only as Useful as Its Restore Path

2026-09-28 · English

Occupied accelerator time is distinct from useful delivered service.
E14 · Compute & economics

The GPU Hour Is the Wrong Unit of Compute

2026-09-28 · English

Chiplet boundaries carry costs from the package into the fleet.
S01 · Chiplets & fleet

Chiplets Save Silicon. The Fleet Pays for the Boundary.

2026-09-06 · English

Memory constraints can leave expensive compute waiting.
S02 · Memory & procurement

The Cheapest Memory Can Strand the Most Expensive Compute

2026-09-06 · English

High accelerator activity need not deliver more useful output.
S03 · Inference & scheduling

High MFU Can Hide Expensive Tokens

2026-09-06 · English

Five-Stage Architecture Thinking

  1. Identify the inherited assumption. Which work is treated as necessary, which implementation as the only possible expression, and which component metric as user value?
  2. Identify the changing conditions. Which shift in physical cost, parallel mapping, power constraints, or system scale makes the old assumption begin to fail?
  3. Establish the causal mechanism. Specify where costs are eliminated, shifted, or hidden. Hiding a wait does not eliminate the underlying latency.
  4. Test the crossover condition. Account for both savings and new overhead. Fix the workload, quality, and comparison boundary, and explain where the conclusion reverses.
  5. Define the architectural action. Decide whether policy belongs in representation, compilation, scheduling, interfaces, or the complete system. Name a diagnostic that could falsify the hypothesis.